pratibha kalaichelvan

 FPGA Research Engineer with strong expertise in designing, synthesizing and verifying complex FPGAs using Verilog & VHDL, simulation tools, and in-lab debugging, MATLAB, Simulink ,Xilinx, Altera, Cadence

Over 4 years of professional experience as FPGA Research Engineer with strong expertise in designing, synthesizing and verifying complex FPGAs using Verilog & VHDL, simulation tools, and in-lab debugging, aiming to utilize and enhance my skills and qualification through company which encourages continuous education and develpoment of its employees and through which I can interact and work efficiently in dynamic environment to prove myself.

M TECH (VLSI DESIGN) from SASTRA UNIVERSITY, Tanjavur,  Tamil Nadu with a CGPA of 8.47, May 2018.